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ds07-12552-1e fujitsu semiconductor data sheet 8-bit proprietary microcontroller cmos f 2 mc-8l mb89470 series MB89475/p475/pv470 n description the mb89470 series has been developed as a general-purpose version of the f 2 mc*-8l family consisting of proprietary 8-bit, single-chip microcontrollers. in addition to a compact instruction set, the microcontroller contains a variety of peripheral functions such as 21- bit time-base timer, watch prescaler, pwc timer, pwm timer, 8/16-bit timer/counter, external interrupt 1 (edge) , external interrupt 2 (level) , 10-bit a/d converter, uart/sio, buzzer, watchdog timer reset. the mb89470 series is designed suitable for home appliance as well as in a wide range of applications for consumer product. * : f 2 mc stands for fujitsu flexible microcontroller. n features ? package used qfp package, lqfp package and sh-dip package for mb89p475, MB89475 mqfp package for mb89pv470 (continued) n packages 48-pin plastic sh-dip 48-pin plastic lqfp 48-pin plastic qfp 48-pin ceramic mqfp (dip-48p-m01) (fpt-48p-m05) (fpt-48p-m13) (mqp-48c-p01)
mb89470 series 2 (continued) ? high-speed operating capability at low voltage ? minimum execution time : 0.32 m s/12.5 mhz ?f 2 mc-8l family cpu core ? six timers pwc timer (also usable as an interval timer) pwm timer 8/16-bit timer/counter 2 21-bit timebase timer watch prescaler ?buzzer 7 frequency types are selectable by software ? external interrupts edge detection (selectable edge) : 4 channels low-level interrupt (wake-up function) : 5 channels ? a/d converter (8 channels) 10-bit successive approximation type ? uart/sio synchronous/asynchronous data transfer capable ? low-power consumption modes stop mode (oscillation stops to minimize the current consumption.) sleep mode (the cpu stops to reduce the current consumption to approx. 1/3 of normal.) subclock mode (for dual clock product) watch mode (for dual clock product) ? watch dog timer reset ? i/o ports : max 39 channels multiplication and division instructions instruction set optimized for controllers 16-bit arithmetic operations bit test and branch instructions bit manipulation instructions, etc.
mb89470 series 3 n product lineup (continued) part number parameter MB89475 mb89p475 mb89pv470 classification mass production products (mask rom product) otp piggy-back rom size 16 k 8-bit (internal rom) 16 k 8-bit (internal prom, can be written to by flash programmer) 32 k 8-bit (external rom) ram size 512 8 bits 1 k 8 bits cpu functions number of instructions instruction bit length instruction length data bit length minimum execution time minimum interrupt processing time : 136 : 8 bits : 1 to 3 bytes : 1, 8, 16 bits : 0.32 m s/12.5 mhz : 2.88 m s/12.5 mhz ports output-only ports (n-channel open drain) input-only ports i/o ports (cmos) total : 7 pins : 3 pins (1 pin in product with dual clock) : 29 pins : 39 pins 21-bit time-base timer interrupt period (0.82 ms, 3.3 ms, 26.2 ms, 419.4 ms) at 10 mhz interrupt period (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 mhz watchdog timer reset period (209.7 ms to 419.4 ms) at 10 mhz reset period (167.8 ms to 335.5 ms) at 12.5 mhz watch prescaler 17 bits interrupt cycle : 31.25 ms, 0.25 ms, 0.5 s, 1.00 s, 2.00 s, 4.00 s/32.768 khz for subclock pulse width count timer 2 channels 8-bit one-shot timer operation (supports underflow output, operating clock period : 1, 4, 32 t inst *, external) 8-bit reload timer operation (supports square wave output, operating clock period : 1, 4, 32 t inst *, external) 8-bit pulse width measurement operation (supports continuous measurement, h width, l width, rising edge to rising edge, falling edge to falling edge measurement and both edge measurement) pwm timer 8-bit reload timer operation (supports square wave output, operating clock period : 1, 4, 32 t inst *, external) 8-bit resolution pwm operation 8/16-bit timer/ counter 1, 2 can be operated either as a 2-channel 8-bit timer/counter (timer 1 and timer 2, each with its own independent operating clock cycle) , or as one 16-bit timer/counter in timer 1 or 16-bit timer/counter operation, event counter operation (external clock-trig- gered) and square wave output capable 8/16-bit timer/ counter 3, 4 can be operated either as a 2-channel 8-bit timer/counter (timer 3 and timer 4, each with its own independent operating clock cycle) , or as one 16-bit timer/counter in timer 3 or 16-bit timer/counter operation, event counter operation (external clock-trig- gered) and square wave output capable external interrupt 4 independent channels (selectable edge, interrupt vector, request flag) 5 channels (low level interrupt)
mb89470 series 4 (continued) * : t inst is one instruction cycle (execution time) , which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock. n package and corresponding products o : available x : not available n differences among products 1. memory size before evaluating using the piggyback product, verify its differences from the product that will actually be used. take particular care on the following point : ? the stack area, etc., is set at the upper limit of the ram. 2. current consumption ? for the mb89pv470, add the current consumed by the eprom mounted in the piggy-back socket. ? when operating at low speed, the current consumed by the one-time prom product is greater than that for the mask rom product. however, the current consumption are roughly the same in sleep or stop mode. ? for more information, see n electrical characteristics. 3. oscillation stabilization time after power-on reset ? for mb89pv470, there is no power-on stabilization time after power-on reset. ? for mb89p475, there is power-on stabilization time after power-on reset. ? for MB89475, the power-on stabilization time can be select. ? for more information, refer to n mask options. part number parameter MB89475 mb89p475 mb89pv470 a/d converter 10-bit resolution 8 channels a/d conversion function (conversion time : 60 t inst *) supports repeated activation by internal clock. uart/sio synchronous/asynchronous data transfer capable (max baud rate : 78.125 kbps at 10 mhz) (7 and 8 bits with parity bit ; 8 and 9 bits without parity bit) buzzer output 7 frequency types (f ch /2 12 , f ch /2 11 , f ch /2 10 , f ch /2 9 , f cl /2 5 , f cl /2 4 , f cl /2 3 ) are selectable by software. standby mode sleep mode, stop mode, subclock mode (dual clock product) and watch mode (dual clock product) process cmos operating voltage 2.2 v to 5.5 v 3.5 v to 5.5 v 2.7 v to 5.5 v part number package MB89475 mb89p475 mb89pv470 dip-48p-m01 o o x fpt-48p-m05 o o x fpt-48p-m13 o o x mqp-48c-p01 x x o
mb89470 series 5 n pin assignments (continued) (top view) (dip-48p-m01) *1 : for pin no. 2, connect this pin to an external 0.1 m f capacitor to ground (for mb89p475 only) . for mb89pv470 and MB89475, this pin should be left unconnected. *2 : high current drive type v ss c* 1 p40/x0a p41/x1a p17/to2 p16/ec2 p15/to1 p14/ec1 p13/int13 p12/int12 p11/int11 p10/int10 p07/an7 p06/an6 p05/an5 p04/an4 p03/an3 p02/an2 p01/an1 p00/an0 av ss av cc p54/int24 p53/int23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 x1 x0 mode p42 rst p20/sck1 p21/so1 p22/si1 p23/pwc p24/pwm p25/si2 v cc p26/so2 p27/sck2 p30/buz* 2 p31* 2 p32* 2 p33* 2 p34* 2 p35* 2 p36* 2 p50/int20 p51/int21 p52/int22
mb89470 series 6 (continued) (top view) (fpt-48p-m05) (fpt-48p-m13) *1 : for pin no. 20, connect this pin to an external 0.1 m f capacitor to ground (for mb89p475 only) . for mb89pv470 and MB89475, this pin should be left unconnected. *2 : high current drive type 1 2 3 4 5 6 7 8 9 10 11 12 p33 * 2 p32 * 2 p31 * 2 p30/buz * 2 p27/sck2 p26/so2 v cc p25/si2 p24/pwm p23/pwc p22/si1 p21/so1 36 35 34 33 32 31 30 29 28 27 26 25 p02/an2 p03/an3 p04/an4 p05/an5 p06/an6 p07/an7 p10/int10 p11/int11 p12/int12 p13/int13 p14/ec1 p15/to1 48 47 46 45 44 43 42 41 40 39 38 37 p34 * 2 p35 * 2 p36 * 2 p50/int20 p51/int21 p52/int22 p53/int23 p54/int24 av cc av ss p00/an0 p01/an1 13 14 15 16 17 18 19 20 21 22 23 24 p20/sck1 rst p42 mode x0 x1 v ss c * 1 p40/x0a p41/x1a p17/to2 p16/ec2
mb89470 series 7 (continued) (top view) (mqp-48c-p01) *1 : package upper-side pin assignment ( mb89pv470 only) n.c. : as connected internally, do not use. *2 : pin no. 20 should be left unconnected. *3 : high current drive type pin no. pin name pin no. pin name pin no. pin name pin no. pin name 49 v pp 57 n.c. 65 o4 73 oe 50 a12 58 a2 66 o5 74 n.c. 51 a7 59 a1 67 o6 75 a11 52 a6 60 a0 68 o7 76 a9 53 a5 61 o1 69 o8 77 a8 54 a4 62 o2 70 ce 78 a13 55 a3 63 o3 71 a10 79 a14 56 n.c. 64 v ss 72 n.c. 80 vcc 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 48 47 46 45 44 43 42 41 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 69 70 71 72 73 74 75 76 60 59 58 57 56 55 54 53 68 67 66 65 64 63 62 61 77 78 79 80 49 50 51 52 p33 * 3 p32 * 3 p31 * 3 p30/buz * 3 p27/sck2 p26/so2 v cc p25/si2 p24/pwm p23/pwc p22/si1 p21/so1 p02/an2 p03/an3 p04/an4 p05/an5 p06/an6 p07/an7 p10/int10 p11/int11 p12/int12 p13/int13 p14/ec1 p15/to1 p34 * 3 p35 * 3 p36 * 3 p50/int20 p51/int21 p52/int22 p53/int23 p54/int24 av cc av ss p00/an0 p01/an1 p20/sck1 rst p42 mode x0 x1 v ss c * 2 p40/x0a p41/x1a p17/to2 p16/ec2 * 1
mb89470 series 8 n pin description (continued) pin no. pin name i/o circuit function lqfp/qfp/ mqfp* 2 sdip* 1 17 47 x0 a connection pins for a crystal or other oscillator. an external clock can be connected to x0. in this case, leave x1 open. 18 48 x1 16 46 mode b input pins for setting the memory access mode. connect directly to v ss . 14 44 rst c reset i/o pin. the pin is a n-ch open-drain type with pull-up resistor and a hysteresis input. the pin outputs an l level when an internal reset request is present. inputting an l level initializes internal cir- cuits. 38 to 31 20 to 13 p00/an0 to p07/an7 d general-purpose i/o port. the pins are shared with the analog inputs for the a/d converter. 30 to 27 12 to 9 p10/int10 to p13/int13 e general-purpose i/o port. a hysteresis input for int10 to int13. the pin is shared with an external interrupt 1 input. 26 8 p14/ec1 e general-purpose i/o port. a hysteresis input for ec1. the pin is shared with the 8/16 bit timer 1 input. 25 7 p15/to1 f general-purpose i/o port. the pin is shared with the output of 8/16-bit timer 1. 24 6 p16/ec2 e general-purpose i/o port. a hysteresis input for ec2. the pin is shared with the 8/16 bit timer 2 input. 23 5 p17/to2 f general-purpose i/o port. the pin is shared with the output of 8/16-bit timer 2. 13 43 p20/sck1 e general-purpose i/o port. a hysteresis input for sck1. the pin is shared with the clock i/o of uart/sio 1. 12 42 p21/so1 f general-purpose i/o port. the pin is shared with the serial data output of uart/sio 1. 11 41 p22/si1 e general-purpose i/o port. a hysteresis input for si1. the pin is shared with the serial data input of uart/sio 1. 10 40 p23/pwc e general-purpose i/o port. a hysteresis input for pwc. this pin is shared with pwc input. 939p24/pwmf general-purpose input port. this pin is shared with pwm output. 8 38 p25/si2 e general-purpose i/o port. a hysteresis input for si2. the pin is shared with the serial data input of uart/sio 2.
mb89470 series 9 (continued) *1 : dip-48p-m01 *2 : fpt-48p-m05/fpt-48p-m13/mqp-48c-p01 *3 : when MB89475 or mb89pv470 is used, this pin will become a n.c. pin without internal connection. when mb89p475 is used, connect this pin to an external 0.1 m f capacitor to ground. pin no. pin name i/o circuit function lqfp/qfp/ mqfp* 2 sdip* 1 6 36 p26/so2 f general-purpose i/o port. the pin is shared with the serial data output of uart/sio 2. 535p27/sck2e general-purpose i/o port. a hysteresis input for sck2. the pin is shared with the clock i/o of uart/sio 2. 434p30/buzg n-channel open-drain output. the pin is shared with buzzer output. 3 to 1, 48 to 46 33 to 28 p31 to p36 g n-channel open-drain output. 21 3 p40/x0a h general-purpose input port. (single clock system) a connection pins for a crystal or other oscillator. (dual clock system) an external clock can be connected to x0a. in this case, leave x1a open. 22 4 p41/x1a h general-purpose input port. (single clock system) a connection pins for a crystal or other oscillator. (dual clock system) an external clock can be connected to x0a. in this case, leave x1a open. 15 45 p42 h general-purpose input port. 45 to 41 27 to 23 p50/int20 to p54/int24 e general-purpose i/o port. a hysteresis input for int20 to int24 . the pin is shared with an external interrupt 2 input. 20 2 c ? capacitor connection pin *3 737v cc ? power supply pin ( + 5 v) . 19 1 v ss ? power supply pin (gnd) . 40 22 av cc ? a/d converter power supply pin. 39 21 av ss ? a/d converter power supply pin. use at the same voltage level as v ss .
mb89470 series 10 ? external eprom socket (mb89pv470 only) * : mqp-48c-p01 pin no. pin name i/o function mqfp* 49 v pp o h level output pin 50 51 52 53 54 55 58 59 60 a12 a7 a6 a5 a4 a3 a2 a1 a0 o address output pins. 61 62 63 o1 o2 o3 i data input pins. 64 v ss o power supply pin (gnd) . 65 66 67 68 69 o4 o5 o6 o7 o8 i data input pins. 70 ce o chip enable pin for the rom. outputs h in standby mode. 71 a10 o address output pin. 73 oe o output enable pin for the rom. always outputs l. 75 76 77 78 79 a11 a9 a8 a13 a14 o address output pins. 80 v cc o power supply pin for the eprom. 56 57 72 74 n.c. ? internally connected pins. always leave open.
mb89470 series 11 n i/o circuit type (continued) type circuit remarks a ? main and sub-clock circuits ? oscillation feedback resistance is approx. 500 k w for main clock circuit and 5 m w for sub-clock cir- cuit. b ? hysteresis input ? the pull-down resistor is approx. 50 k w . (no pull-down resistor in mb89p475) c ? the pull-up resistance (p-chan- nel) is approx. 50 k w . ? hysteresis input d ? cmos output ?cmos input ? selectable pull-up resistor approx. 50 k w e ? cmos output ?cmos input ? selectable pull-up resistor approx. 50 k w x1 (x1a) x0 (x0a) nch pch pch nch stop mode control signal pch nch r pch nch r pull-up resistor register adin pch nch pull-up resistor register resources port r
mb89470 series 12 (continued) type circuit remarks f ? cmos output ?cmos input ? selectable pull-up resistor approx. 50 k w g ? n-channel open-drain output ? selectable pull-up resistor approx. 50 k w h ?cmos input pch nch pull-up resistor regsiter r pch nch pull-up resistor register r port
mb89470 series 13 n handling devices 1. preventing latchup latchup may occur on cmos ics if voltage higher than v cc or lower than v ss is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on 1. absolute maximum ratings in n electrical characteristics is applied between v cc and v ss . when latchup occurs, power supply current increases rapidly and might thermally damage elements. when using, take great care not to exceed the absolute maximum ratings. also, take care to prevent the analog power supply (av cc ) and analog input from exceeding the digital power supply (v cc ) when the analog system power supply is turned on and off. 2. treatment of unused input pins leaving unused input pins open could cause malfunctions. they should be connected to a pull-up or pull-down resistor. 3. treatment of power supply pins on microcontrollers with a/d converter connect to be av cc = v cc and av ss = v ss even if the a/d converter is not in use. 4. treatment of n.c. pins be sure to leave (internally connected) n.c. pins open. 5. power supply voltage fluctuations although v cc power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. stabilizing voltage supplied to the ic is therefore important. as stabilization guidelines, it is recommended to control power so that v cc ripple fluctuations (p-p value) will be less than 10 % of the standard v cc value at the commercial frequency (50 hz to 60 hz) and the transient fluctuation rate will be less than 0.1 v/ms at the time of a momentary fluctuation such as when power is switched. 6. precautions when using an external clock even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and wake-up from stop mode. 7. note to noise in the external reset pin (rst ) if the reset pulse applied to the external reset pin (rst ) does not meet the specifications, it may cause malfunc- tions. use causion so that the reset pulse less than the specifications will not be fed to the external reset pin (rst ).
mb89470 series 14 n programming otprom in mb89p475 with serial programmer 1. programming the otprom with serial programmer ? all otp products can be programmed with serial programmer. 2. programming the otprom ? to program the otprom using fujitsu mcu programmer mb91919-001. inquiry : fujitsu microelectronics asia pte ltd. : tel (65) -2810770 fax (65) -2810220 3. programming adapter for otprom ? to program the otprom using fujitsu mcu programmer mb91919-001, use the programming adapter listed below. inquiry : fujitsu microelectronics asia pte ltd. : tel (65) -2810770 fax (65) -2810220 4. otprom content protection for product with otprom content protection feature (mb89p475-102, mb89p475-202) , otprom content can be read using serial programmer if the otprom content protection mechanism is not activated. one predefined area of the otprom (fffc h ) is assigned to be used for preventing the read access of otprom content. if the protection code 00 h is written in this address (fffc h ) , the otprom content cannot be read by any serial programmer. note : the program written into the otprom cannot be verified once the otprom protection code is written (00 h in fffc h ) . it is advised to write the otprom protection code at last. 5. programming yield all bits cannot be programmed at fujitsu shipping test to a blanked otprom microcomputer, due to its nature. for this reason, a programming yield of 100 % cannot be assured at all times. package compatible socket adapter dip-48p-m01 mb91919-805 + mb91919-800 fpt-48p-m05 mb91919-806 + mb91919-800 fpt-48p-m13 mb91919-807 + mb91919-800
mb89470 series 15 n programming otprom in mb89p475 with programmer 1. programming otprom with parallel programmer ? only products without protection feature (i.e. mb89p475-101 and mb89p475-201) can be programmed with parallel programmer. product with protection feature (i.e. mb89p475-102 and mb89p475-202) cannot be programmed with parallel programmer. 2. rom writer adapters and recommended rom writers ? the following shows rom writer adapters and recommended rom writers. ando electric co., ltd. (parallel programmer) * : for the version of the programmer, contact the flash support group, inc. fujitsu microelectronics asia pte ltd. (serial programmer) inquiries : fujitsu microelectronics asia pte ltd. : tel (65) -2810770 sunhayato corp. : tel 81-(3)-3984-7791 fax 81-(3)-3971-0535 e-mail : adapter@sunhayato.co.jp flash support group, inc : fax 81-(53)-428-8377 e-mail : support@j-fsg.co.jp 3. writing data to the otprom (1) set the otprom writer for the cu50-otp (device code : cdb6dc) . (2) load the program data to the otprom writer. (3) write data using the otprom writer. 4. programming yield all bits cannot be programmed at fujitsu shipping test to a blanked otprom microcomputer, due to its nature. for this reason, a programming yield of 100 % cannot be assured at all times. package applicable adapter model recommended writer dip-48p-m01 rom2-48sd-32dp-8la af9708* af9709* af9723* fpt-48p-m05 rom2-48lqf-32dp-8la2 fpt-48p-m13 rom2-48qf-32dp-8la2 package applicable adapter model recommended writer dip-48p-m01 mb91919-601 mb91919-001 fpt-48p-m05 mb91919-602 fpt-48p-m13 mb91919-603
mb89470 series 16 n programming to the eprom with piggyback/evaluation device 1. eprom for use mbm27c256a-20tvm 2. programming socket adapter to program to the prom using an eprom programmer, use the socket adapter (manufacturer : sunhayato corp.) listed below. inquiry : sunhayato corp. : tel 81-(3)-3984-7791 fax 81-(3)-3971-0535 e-mail : adapter@sunhayato.co.jp 3. memory space memory space in each mode is diagrammed below. 4. programming to the eprom (1) set the eprom programmer to the mbm27c256. (2) load program data into the eprom programmer at 0000 h to 7fff h . (3) program to 0000 h to 7fff h with the eprom programmer. package adapter socket part number lcc-32 (square) rom-32lc-28dp-s 0000 h 7fff h 0000 h ram not available prom 32 kb eprom 32 kb i/o 0080 h ffff h 8000 h 0880 h address normal operating mode corresponding addresses on the eprom programmer
mb89470 series 17 n block diagram *1 : high current pins *2 : unconnected pin for mb89pv470 and MB89475 *3 : p40, p41 pins for single-clock system and x01a, x1a pins for dual-clock system x0 oscillator clock controller sub-clock oscillator reset circuit (watchdog timer) 21-bit time-base timer external interrupt 2 (level) external interrupt 1 (level) 8/16-bit timer 1, 2 uart/sio 1 uart/sio 2 buzzer 8-bit pwc 8-bit pwm 8/16-bit timer 3, 4 watch prescaler internal data bus 55 cmos input port 4 cmos i/o port 0 p00/an0 to p07/an7 av cc av ss p10/int10 to p13/int13 p14/ec1 p15/to1 p16/ec2 p20/sck1 p21/so1 p22/si1 p23/pwc p24/pwm p25/si2 p26/so2 p27/sck2 p30/buz *1 p31 *1 to p36 *1 p17/to2 8 8 44 cmos i/o port 1 cmos i/o port 2 n-ch open-drain output port 3 6 10-bit a/d converter cmos i/o port 5 1 kbyte ram/512 byte ram 16 kbyte rom other pins mode, v cc , v ss , c *2 f 2 mc-8l cpu x1 p40/x0a* 3 p41/x1a* 3 p42 p50/int20 to p54/int24 rst
mb89470 series 18 n cpu core 1. memory space the microcontrollers of the mb89470 series offer a memory space of 64 kbytes for storing all of i/o, data, and program areas. the i/o area is located at the lowest address. the data area is provided immediately above the i/o area. the data area can be divided into register, stack, and direct areas according to the application. the program area is located at exactly the opposite end, that is, near the highest address. provide the tables of interrupt reset vectors and vector call instructions toward the highest address within the program area. the memory space of the mb89470 series is structured as illustrated below. 0000 h 0080 h 0100 h mb89pv470 i/o ram vacant external rom (32 k) 0000 h 0080 h 0100 h 0200 h c000 h c000 h 8000 h ffff h i/o ram vacant ffff h 0280 h 0280 h 0200 h 0480 h ffc0 h ffc0 h 0000 h 0080 h 0100 h mb89p475 MB89475 i/o ram vacant vector table (reset, interrupt, vector call instruction) rom rom ffff h 0200 h ffc0 h general- purpose registers general- purpose registers general- purpose registers memory map
mb89470 series 19 2. registers the f 2 mc-8l family has two types of registers; dedicated registers in the cpu and general-purpose registers in the memory. the following registers are provided : the ps can further be divided into higher 8 bits for use as a register bank pointer (rp) and the lower 8 bits for use as a condition code register (ccr) . (see the diagram below.) program counter (pc) : a 16-bit register for indicating instruction storage positions accumulator (a) : a 16-bit temporary register for storing arithmetic operations, etc. when the instruction is an 8-bit data processing instruction, the lower byte is used. temporary accumulator (t) : a 16-bit register which performs arithmetic operations with the accumulator. when the instruction is an 8-bit data processing instruction, the lower byte is used. index register (ix) : a 16-bit register for index modification extra pointer (ep) : a 16-bit pointer for indicating a memory address stack pointer (sp) : a 16-bit register for indicating a stack area program status (ps) : a 16-bit register for storing a register pointer, a condition code pc a t ix ep sp ps : program counter : accumulator : temporary accumulator : index register : extra pointer : stack pointer : program status 16 bits fffd h undefined undefined undefined undefined undefined i-flag = 0, il1, 0 = 11 other bits are undefined. initial value ps rp ccr 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 rp vacancy vacancy vacancy h i il1, 0 n z v c structure of the program status register
mb89470 series 20 the rp indicates the address of the register bank currently in use. the relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. the ccr consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of cpu operations at the time of an interrupt. h-flag : set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. cleared otherwise. this flag is for decimal adjustment instructions. i-flag : interrupt is allowed when this flag is set to 1. interrupt is prohibited when the flag is set to 0. set to 0 when reset. il1, 0 : indicates the level of the interrupt currently allowed. processes an interrupt only if its request level is higher than the value indicated by this bit. il1 il0 interrupt level high-low 00 1 high low = no interrupt 01 10 2 11 3 n-flag : set if the msb is set to 1 as the result of an arithmetic operation. cleared when the bit is set to 0. z-flag : set when an arithmetic operation results in 0. cleared otherwise. v-flag : set if the complement on 2 overflows as a result of an arithmetic operation. reset if the overflow does not occur. c-flag : set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. cleared other- wise. set to the shift-out vallue in the case of a shift instruction. "0" "0" "0" "0" "0" "0" "0" "1" r4 r3 r2 r1 r0 b2 b1 rp lower op codes b0 a7 a6 a5 a4 a3 a2 a1 a0 a15 generated addresses a14 a13 a12 a11 a10 a9 a8 rule for conversion of actual addresses of the general-purpose register area
mb89470 series 21 the following general-purpose registers are provided : general-purpose registers : an 8-bit resister for storing data the general-purpose registers are 8 bits and located in the register banks of the memory. one bank contains eight registers. up to a total of 32 banks can be used on the mb89470 series. the bank currently in use is indicated by the register bank pointer (rp) . r0 this address = 0100 h + 8 (rp) r1 r2 r3 r4 r5 r6 r7 memory area 32 banks register bank configuration
mb89470 series 22 n i/o map (continued) address register name register description read/write initial value 00 h pdr0 port 0 data register r/w xxxxxxxx b 01 h ddr0 port 0 data direction register w* 00000000 b 02 h pdr1 port 1 data register r/w xxxxxxxx b 03 h ddr1 port 1 data direction register w* 00000000 b 04 h pdr2 port 2 data register r/w 00000000 b 05 h (reserved) 06 h ddr2 port 2 data direction register r/w 00000000 b 07 h sycc system clock control register r/w -xxmm-00 b 08 h stbc standby control register r/w 0001xxxx b 09 h wdtc watchdog timer control register w* 0---xxxx b 0a h tbtc timebase timer control register r/w 00---000 b 0b h wpcr watch prescaler control register r/w 00--0000 b 0c h pdr3 port 3 data register r/w -1111111 b 0d h pdr4 port 4 data register r -----xxx b 0e h rsfr reset flag register r xxxx---- b 0f h buzr buzzer register r/w -----000 b 10 h pdr5 port 5 data register r/w ---xxxxx b 11 h ddr5 port 5 data direction register r/w ---00000 b 12 h , 13 h (reserved) 14 h t4cr timer 4 control register r/w 000000x0 b 15 h t3cr timer 3 control register r/w 000000x0 b 16 h t4dr timer 4 data register r/w xxxxxxxx b 17 h t3dr timer 3 data register r/w xxxxxxxx b 18 h t2cr timer 2 control register r/w 000000x0 b 19 h t1cr timer 1 control register r/w 000000x0 b 1a h t2dr timer 2 data register r/w xxxxxxxx b 1b h t1dr timer 1 data register r/w xxxxxxxx b 1c h to 1f h (reserved) 20 h adc1 a/d control register 1 r/w -00000x0 b 21 h adc2 a/d control register 2 r/w -0000001 b 22 h addh a/d data register (upper byte) r ------xx b 23 h addl a/d data register (lower byte) r xxxxxxxx b 24 h ader a/d input enable register r/w 11111111 b 25 h (reserved) 26 h smc11 uart/sio serial mode control register 11 r/w 00000000 b
mb89470 series 23 (continued) * : bit manipulation instruction cannot be used. address register name register description read/write initial value 27 h smc12 uart/sio serial mode control register 12 r/w 00000000 b 28 h ssd1 uart/sio serial status and data register 1 r 00001--- b 29 h sidr1/sodr1 uart/sio serial data register 1 r/w * xxxxxxxx b 2a h src1 uart/sio serial rate control register 1 r/w xxxxxxxx b 2b h smc21 uart serial mode control register 21 r/w 00000000 b 2c h smc22 uart serial mode control register 22 r/w 00000000 b 2d h ssd2 uart serial status and data register 2 r 00001--- b 2e h sidr2/sodr2 uart serial data register 2 r/w * xxxxxxxx b 2f h src2 uart serial rate control register 2 r/w xxxxxxxx b 30 h eic1 external interrupt 1 control register 1 r/w 00000000 b 31 h eic2 external interrupt 1 control register 2 r/w 00000000 b 32 h eie2 external interrupt 2 enable register r/w ---00000 b 33 h eif2 external interrupt 2 flag register r/w -------0 b 34 h pcr1 pwc control register 1 r/w 0-0--000 b 35 h pcr2 pwc control register 2 r/w 00000000 b 36 h plbr pwc reload buffer register r/w xxxxxxxx b 37 h (reserved) 38 h cntr pwm timer control register r/w 0-00000000 b 39 h comr pwm timer compare register w* xxxxxxxx b 3a h to 6f h (reserved) 70 h purc0 port 0 pull up resistor control register r/w 11111111 b 71 h purc1 port 1 pull up resistor control register r/w 11111111 b 72 h purc2 port 2 pull up resistor control register r/w 11111111 b 73 h purc3 port 3 pull up resistor control register r/w -1111111 b 74 h (reserved) 75 h purc5 port 5 pull up resistor control register r/w ---1111 b 76 h to 7a h (reserved) 7b h ilr1 interrupt level setting register 1 w* 11111111 b 7c h ilr2 interrupt level setting register 2 w* 11111111 b 7d h ilr3 interrupt level setting register 3 w* 11111111 b 7e h ilr4 interrupt level setting register 4 w* 11111111 b 7f h (reserved)
mb89470 series 24 ? read/write access symbols ? initial value symbols r/w : readable and writable r : read-only w : write-only 0 : the initial value of this bit is 0. 1 : the initial value of this bit is 1. x : the initial value of this bit is undefined. - : unused bit. m : the initial value of this bit is determined by mask option.
mb89470 series 25 n electrical characteristics 1. absolute maximum ratings (av ss = v ss = 0.0 v) warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. parameter symbol value unit remarks min max power supply voltage v cc av cc v ss - 0.3 v ss + 6.0 v av cc must not exceed v cc input voltage v i v ss - 0.3 v cc + 0.3 v output voltage v o v ss - 0.3 v cc + 0.3 v l level maximum output current i ol ? 15 ma l level average output current i olav1 ? 4ma average value (operating current operating rate) p00 to p07, p10 to p17, p20 to p27, p50 to p54, rst i olav2 ? 12 ma average value (operating current operating rate) p30 to p36 l level total maximum output current s i ol ? 100 ma l level total average output current s i olav ? 40 ma average value (operating current operating rate) h level maximum output current i oh ?- 15 ma h level average output current i ohav ?- 2ma average value (operating current operating rate) h level total maximum output current s i oh ?- 50 ma h level total average output current s i ohav ?- 20 ma average value (operating current operating rate) power consumption p d ? 300 mw operating temperature t a - 40 + 85 c storage temperature tstg - 55 + 150 c
mb89470 series 26 2. recommended operating conditions (av ss = v ss = 0.0 v) * : these values depend on the operating conditions and the analog assurance range. see operating voltage vs. main clock operating frequency and 5. a/d converter electrical characteristics. parameter symbol value unit remarks min max power supply voltage v cc av cc 2.2* 5.5 v operation assurance range MB89475 3.5* 5.5 v operation assurance range mb89p475 2.7* 5.5 v operation assurance range mb89pv470 1.5 5.5 v retains the ram state in stop mode operating temperature t a - 40 + 85 c
mb89470 series 27 operating voltage vs. main clock operating frequency operating voltage vs. main clock operating frequency indicates the operating frequency of the external oscilla- tor at an instruction cycle of 4/f ch . since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the oper- ating speed is switched using a gear. warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the devices electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. 5.5 5.0 4.5 4.0 3.5 3.0 2.0 2.7 2.2 1.0 note : this area is not assured for mb89p475. this area is not assured for mb89pv470 and mb89p475. 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 4.0 2.0 1.33 1.0 0.8 0.66 0.57 0.50 0.44 0.4 0.36 0.33 12.5 0.32 operating voltage (v) analog accuracy assurance range : v cc = av cc = 4.5 v to 5.5 v main clock operating freq. (mhz) min execution time (inst. cycle) ( m s)
mb89470 series 28 3. dc characteristics (av cc = v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) (continued) parameter symbol pin condition value unit remarks min typ max h level input voltage v ih p00 to p07, p10 to p17, p20 to p27, p40 to p42, p50 to p54 ? 0.7 v cc ? v cc + 0.3 v v ihs rst , mode, ec1, ec2, sck1, si1, sck2, si2, pwc, int10 to int13, int20 to int24 ? 0.8 v cc ? v cc + 0.3 v l level input voltage v il p00 to p07, p10 to p17, p20 to p27, p40 to p42, p50 to p54 ? v ss - 0.3 ? 0.3 v cc v v ils rst , mode, ec1, ec2, sck1, si1, sck2, si2, pwc, int10 to int13, int20 to int24 ? v ss - 0.3 ? 0.2 v cc v open-drain output pin application voltage v d p30 to p36 ? v ss - 0.3 ? v cc + 0.3 v h level output voltage v oh p00 to p07, p10 to p17, p20 to p27, p50 to p54 i oh = - 2.0 ma 4.0 ?? v l level output voltage v ol1 p00 to p07, p10 to p17, p20 to p27, p50 to p54, rst i ol = 4.0 ma ?? 0.4 v v ol2 p30 to p36 i ol = 12.0 ma ?? 0.4 v input leak- age current i li p00 to p07, p10 to p17, p20 to p27, p50 to p54 0.45 v < v i < v cc - 5 ?+ 5 m a without pull-up resistor open drain output leakage current i lod p30 to p36 0.45 v < v i < v cc - 5 ?+ 5 m a
mb89470 series 29 (continued) (av cc = v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) parameter symbol pin condition value unit remarks min typ max pull-down resistance r down mode v i = v cc 25 50 100 k w except mb89p475 pull-up resistance r pull p00 to p07, p10 to p17, p20 to p27, p30 to p36, p50 to p54, rst v i = 0.0 v 25 50 100 k w when pull-up resistor is selected (ex- cept rst ) power supply current i cc1 v cc f ch = 12.5 mhz t inst = 0.32 m s main clock run mode ? 713ma i cc2 f ch = 12.5 mhz t inst = 5.12 m s main clock run mode ? 13ma i ccs1 f ch = 12.5 mhz t inst = 0.32 m s main clock sleep mode ? 2.5 5 ma i ccs2 f ch = 12.5 mhz t inst = 5.12 m s main clock sleep mode ? 0.7 2 ma i ccl f cl = 32.768 khz subclock mode ? 37 85 m a mb89pv470 MB89475 ? 350 785 m a mb89p475 i ccls f cl = 32.768 khz subclock sleep mode ? 11 30 m a i cct f cl = 32.768 khz watch mode main clock stop mode ? 1.4 15 m a mb89pv470 MB89475 ? 5.6 21 m a mb89p475 i cch ta = + 25 c subclock stop mode 110 m a i a av cc f ch = 12.5 mhz ? 2.8 6 ma a/d converting i ah ta = + 25 c ? 15 m a a/d stop input capacitance c in other than v cc , v ss , av cc , av ss f = 1 mhz ? 515pf
mb89470 series 30 4. ac characteristics (1) reset timing (v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) notes : t hcyl is the oscillation cycle (1/f c ) to input to the x0 pin. if the reset pulse applied to the external reset pin (rst ) does not meet the specifications, it may cause malfunctions. use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (rst ). (2) power-on reset (av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) note : make sure that power supply rises within the selected oscillation stabilization time. rapid changes in power supply voltage may cause a power-on reset. if power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. parameter symbol condition value unit remarks min max rst l pulse width t zlzh ? 48 t hcyl ? ns parameter symbol condition value unit remarks min max power supply rising time t r ? ? 50 ms power supply cut-off time t off 1 ? ms due to repeated operations 0.2 v cc 0.2 v cc t zlzh rst 0.2 v 3.5 v 0.2 v 0.2 v t off v cc t r
mb89470 series 31 (3) clock timing (av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) parameter symbol pin value unit remarks min typ max clock frequency f ch x0, x1 1 ? 12.5 mhz f cl x0a, x1a ? 32.768 ? khz clock cycle time t hcyl x0, x1 80 ? 1000 ns t lcyl x0a, x1a ? 30.5 ?m s input clock pulse width p wh p wl x0 20 ?? ns external clock p whl p wll x0a ? 15.2 ?m s input clock rising/falling time t cr t cf x0, x0a ?? 10 ns 0.2 v cc 0.2 v cc 0.8 v cc 0.8 v cc 0.2 v cc p wh t hcyl t cr t cf p wl x0 x0 x1 c1 c2 f ch when a crystal or ceramic oscillator is used open when an external clock is used f ch x0 x1 x0 and x1 timing and conditions main clock conditions
mb89470 series 32 (4) instruction cycle parameter symbol value unit remarks instruction cycle (minimum execution time) t inst 4/f ch , 8/f ch , 16/f ch , 64/f ch m s (4/f ch ) t inst = 0.32 m s when operating at f ch = 12.5 mhz 2/f cl m s t inst = 61.036 m s when operating at f cl = 32.768 khz x0a x1a c 0 c 1 rd open when a crystal or ceramic oscillator is used when sub-clock is not used in dual clock product x0a x1a f cl open when an external clock is used f cl x0a x1a 0.8 v cc t lcyl 0.2 v cc p whl p wll t cf t cr x0a subclock timing and conditions subclock conditions
mb89470 series 33 (5) serial i/o timing (v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) * : for information on t inst , see (4) instruction cycle. parameter symbol pin condition value unit min max serial clock cycle time t scyc sck1, sck2 internal shift clock mode 2 t inst * ?m s sck ? so time t slov sck1, so1, sck2, so2, - 200 + 200 ns valid si ? sck - t ivsh si1, sck1, si2, sck2 1/2 t inst * ? ns sck - ? valid si hold time t shix sck1, si1, sck2, si2 1/2 t inst * ? ns serial clock h pulse width t shsl sck1, sck2 external shift clock mode 1 t inst * ?m s serial clock l pulse width t slsh 1 t inst * ?m s sck ? so time t slov sck1, so1, sck2, so2 0 200 ns valid si ? sck - t ivsh si1, sck1, si2, sck2 1/2 t inst * ? ns sck - ? valid si hold time t shix sck1, si1, sck2, si2 1/2 t inst * ? ns 0.8 v 2.4 v 2.4 v 0.8 v cc 0.2 v cc 0.8 v t scyc t slov t ivsh t shix sck so si 0.8 v 0.8 v cc 0.2 v cc 0.2 v cc 0.2 v cc 2.4 v 0.8 v cc 0.8 v cc 0.8 v cc 0.2 v cc t slsh t shsl t slov t ivsh t shix sck so si 0.8 v 0.8 v cc 0.2 v cc internal clock operation external clock operation
mb89470 series 34 (6) peripheral input timing (av cc = v cc = 5.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) * : for information on t inst , see (4) instruction cycle. parameter symbol pin value unit remarks min max peripheral input h pulse width 1 t ilih1 int10 to int13, int20 to int24 , ec1, ec2, pwc 2 t inst * ?m s peripheral input l pulse width 1 t ihil1 2 t inst * ?m s 0.2 v cc 0.8 v cc t ihil1 0.8 v cc int10 to int13, int20 to int24, ec1, ec2, pwc 0.2 v cc t ilih1
mb89470 series 35 5. a/d converter electrical characteristics (1) a/d converter electrical characteristics (av cc = v cc = 4.5 v to 5.5 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) * : for information on t inst , see (4) instruction cycle in 4. ac characteristics. (2) a/d converter glossary ? resolution analog changes that are identifiable with the a/d converter when the number of bits is 10, analog voltage can be divided into 2 10 = 1024. ? linearity error (unit : lsb) the deviation of the straight line connecting the zero transition point (00 0000 0000 ? 00 0000 0001) with the full-scale transition point (11 1111 1111 ? 11 1111 1110) from actual conversion characteristics. ? differential linearity error (unit : lsb) the deviation of input voltage needed to change the output code by 1 lsb from the theoretical value. ? total error (unit : lsb) the difference between theoretical and actual conversion values. parameter symbol pin value unit remarks min typ max resolution ? ? ? 10 ? bit total error ?? 4.0 lsb linearity error ?? 2.5 lsb differential linearity error ?? 1.9 lsb zero transition voltage v ot av ss - 1.5 lsb av ss + 0.5 lsb av ss + 2.5 lsb v full-scale transition voltage v fst av cc - 4.5 lsb av cc - 2.5 lsb av cc - 0.5 lsb v a/d mode conversion time ??? 60 t inst * m s analog port input current i ain an0 to an7 ?? 10 m a analog input voltage v ain av ss ? av cc v
mb89470 series 36 (continued) v fst 1.5 lsb 1 lsb analog input theoretical i/o characteristics digital output 0.5 lsb v ot av cc av ss 3ff 3fe 3fd 004 003 002 001 analog input total error digital output v nt actual conversion value actual conversion value theoretical value {1 lsb n + v ot } av cc av ss 3ff 3fe 3fd 004 003 002 001 004 003 002 001 av ss analog input zero transition error digital output actual conversion value v ot (actual measurement) actual conversion value 3ff 3fe 3fd 3fc av cc analog input full-scale transition error digital output v fst (actual measurement) actual conversion value theoretical value actual conversion value 1 lsb = v fst - v ot 1022 (v) total error = v nt - {1 lsb n + 0.5 lsb} 1 lsb
mb89470 series 37 (continued) 3ff 3fe 3fd 004 003 002 001 av ss av cc v nt {1 lsb n + v ot } analog input linearity error digital output actual conversion value actual conversion value theoretical value v ot (actual measurement) v fst (actual measurement) v (n + 1) t v nt n + 1 n n - 1 n - 2 av ss av cc analog input differential linearity error digital output actual conversion value actual conversion value theoretical value - 1 differential linearity error v (n + 1) t - v nt 1 lsb linearity error v nt - {1 lsb n + v ot } 1 lsb = =
mb89470 series 38 (3) notes on using a/d converter ? input impedance of the analog input pins the a/d converter used for the mb89470 series contains a sample hold circuit as illustrated below to fetch analog input voltage into the sample hold capacitor for 16 instruction cycles after activation a/d conversion. for this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage might not stabilize within the analog input sampling period. therefore, it is recommended to keep the output impedance of the external circuit low . note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about 0.1 m f for the analog input pin. sample hold circuit MB89475 mb89pv470 mb89p475 r : analog input equivalent resistance 2.2 k w 2.6 k w c : analog input equivalent capacitance 45 pf 28 pf analog input pin sample hold circuit if the analog input impedance is higher than to 10 k w , it is recommended to connect an external capacitor of approx. 0.1 m f. comparator r c analog channel selector close for 16 instruction cycles after activating a/d conversion. analog input circuit model
mb89470 series 39 n example characteristics ? l level output voltage ? h level output voltage ? h level input voltage/l level input voltage v cc = 3.0 v v cc = 3.5 v v cc = 4.0 v v cc = 4.5 v v cc = 5.0 v v cc = 5.5 v v cc = 6.0 v v ol1 - i ol (MB89475) ta = + 25 c v ol1 (v) 0.8 0.6 0.4 0.2 0.0 0246810 i ol1 (ma) 0.4 0.3 0.2 0.1 0.0 024 6 810121416 v cc = 3.0 v v cc = 3.5 v v cc = 4.0 v v cc = 4.5 v v cc = 5.0 v v cc = 5.5 v v cc = 6.0 v ta = + 25 c v ol2 - i o2 (MB89475) v ol2 (v) i ol2 (ma) (v cc - v oh ) - i oh (MB89475) v cc - v oh (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 - 2 - 4 - 6 - 8 - 10 i oh (ma) v cc = 3.0 v v cc = 3.5 v v cc = 4.0 v v cc = 4.5 v v cc = 5.0 v v cc = 6.0 v v cc = 5.5 v ta = + 25 c cmos input (MB89475) v in (v) v cc (v) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1234567 ta = + 25 c v in (v) v cc (v) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1234567 ta = + 25 c v ihs v ils cmos hysteresis input (MB89475) v ihs : threshold when input voltage in hysteresis characteristics is set to h level. v ils : threshold when input voltage in hysteresis characteristics is set to l level.
mb89470 series 40 ? power supply current (external clock) (continued) i cc1 - v cc (MB89475) i cc1 (ma) v cc (v) 0.0 2.0 4.0 6.0 8.0 10.0 1234567 ta = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz i cc2 - v cc (MB89475) i cc1 (ma) v cc (v) 0.0 0.2 0.4 0.6 0.8 1.0 1234567 ta = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz 1.2 1.4 i cc1 (ma) v cc (v) 0.0 0.5 1.0 1.5 2.0 2.5 1234567 ta = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz 3.0 3.5 i ccs1 - v cc (MB89475) i cc2 (ma) v cc (v) 0.0 0.2 0.4 0.6 0.8 1.0 1234567 ta = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz i ccs2 - v cc (MB89475)
mb89470 series 41 (continued) ta = + 25 c f ch = 32.768 mhz 0 10 20 30 40 50 60 i ccl ( m a) 1234567 v cc (v) i ccl - v cc (MB89475) f ch = 32.768 mhz ta = + 25 c i ccls ( m a) i ccls - v cc (MB89475) 0 2 4 6 8 10 12 14 16 1234567 v cc (v) 0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 1234567 v cc (v) i cct ( m a) i cct - v cc (MB89475) ta = + 25 c f ch = 32.768 mhz
mb89470 series 42 ? pull-up resistance ta = + 25 c r pull - v cc (MB89475) r pull (k w ) 0 40 80 120 160 200 240 280 320 1234567 v cc (v)
mb89470 series 43 n mask options n ordering information no. part number MB89475 mb89p475 mb89pv470 specifying procedure specify when ordering mask setting not possible setting not possible 1 selection of clock mode ? single clock mode ? dual clock mode selectable 101/102 : single clock 201/202 : dual clock 101 : single clock 201 : dual clock 2 selection of oscillation stabilization time (osc) ? the initial value of the oscillation stabilization time for the main clock can be set by selecting the values of the wtm1 and wtm0 bits on the right. selectable osc 1 : 2 14 /f ch 2 : 2 17 /f ch 3 : 2 18 /f ch fixed to oscillation stabilization time of 2 18 /f ch fixed to oscillation stabilization time of 2 18 /f ch 3 selection of power-on stabilization time ?nil ?2 17 /f ch selectable fixed to power-on sta- bilization time of 2 17 /f ch fixed to nil part number package remarks MB89475pfm mb89p475-101pfm mb89p475-102pfm mb89p475-201pfm mb89p475-202pfm 48-pin plastic qfp (fpt-48p-m13) 101 : single clock, without content protection 102 : single clock, with content protection 201 : dual clock, without content protection 202 : dual clock, with content protection MB89475pfv mb89p475-101pfv mb89p475-102pfv mb89p475-201pfv mb89p475-202pfv 48-pin plastic lqfp (fpt-48p-m05) MB89475p-sh mb89p475-101p-sh mb89p475-102p-sh mb89p475-201p-sh mb89p475-202p-sh 48-pin plastic sh-dip (dip-48p-m01) mb89pv470-101cf mb89pv470-201cf 48-pin ceramic mqfp (mqp-48c-p01)
mb89470 series 44 n package dimensions (continued) 48-pin plastic sh-dip (dip-48p-m01) dimensions in mm (inches) note : the values in parentheses are reference values. c 1994 fujitsu limited d48002s-3c-3 43.69 +0.20 ?.30 +.008 ?012 1.720 13.80?.25 (.543?010) index-1 5.25(.207) 3.00(.118) 0.45?.10 (.018?004) +.020 ? .039 ? +0.50 1.00 1.778?.18 (.070?007) 1.778(.070) max 0.25?.05 (.010?002) 15.24(.600) typ 15?ax index-2 40.894(1.610)ref max min 0.51(.020)min
mb89470 series 45 (continued) 48-pin plastic lqfp (fpt-48p-m05) dimensions in mm (inches) note : the values in parentheses are reference values. c 2002 fujitsu limited f48013s-c-5-9 24 13 36 25 48 37 index *7.00 (.276 )sq 9.00 0.20(.354 .008)sq 0.145 0.055 (.006 .002) 0.08(.003) "a" 0 ? ~8 ? .059 C.004 +.008 C0.10 +0.20 1.50 0.50 0.20 (.020 .008) 0.60 0.15 (.024 .006) 0.10 0.10 (.004 .004) (stand off) 0.25(.010) details of "a" part 1 12 0.08(.003) m (.008 .002) 0.20 0.05 0.50(.020) lead no. (mounting height) +0.40 C0.10 +.016 C.004
mb89470 series 46 (continued) 48-pin plastic qfp (fpt-48p-m13) note 1) *: these dimensions do not include resin protrusion. note 2) pins width and pins thickness include plating thickness. note 3) pins width do not include tie bar cutting remainder. dimensions in mm (inches) note : the values in parentheses are reference values. c 2003 fujitsu limited f48023s-c-3-4 (.013.002) 0.320.05 0.80(.031) m 0.20(.008) 0.10(.004) (.007.002) 0.170.06 10.000.20(.394.008)sq 13.100.40(.516.016)sq 112 13 24 37 48 25 36 index details of "a" part 0.800.20 (.031.008) 0.880.15 (.035.006) 0.25(.010) .008 C.008 +.004 C0.20 +0.10 0.20 (stand off) 1.95 +0.40 C0.20 +.016 C.008 .077 (mounting height) 0~8 ? "a" 0.10(.004) *
mb89470 series 47 (continued) 48-pin ceramic mqfp (mqp-48c-p01) dimensions in mm (inches) note : the values in parentheses are reference values. C.010 +.018 C0.25 +0.45 +0.13 C0.0 +.005 C0 pin no.1 index 1.50(.059)typ 1.00(.040)typ 8.80(.346)ref (.0315.0087) 0.800.22 (.016.003) 0.400.08 .043 1.10 0.60(.024)typ 8.50(.335)max (.006.002) 0.150.05 pad no.1 index 4.50(.177)typ 0.30(.012)typ typ typ 8.71(.343) 7.14(.281) (.040.005) 1.020.13 10.92 .430 pin no.1 index 17.20(.677)typ (.591.010) 15.000.25 (.583.014) 14.820.35 1994 fujitsu limited m48001sc-4-2 c
mb89470 series fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of fujitsu or any third party or does fujitsu warrant non-infringement of any third-partys intellectual property right or other right by using such information. fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. f0303 ? fujitsu limited printed in japan

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